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Espressif Systems /ESP32-P4 /MIPI_CSI_BRIDGE /HOST_CTRL

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Interpret as HOST_CTRL

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (CSI_ENABLECLK)CSI_ENABLECLK 0 (CSI_CFG_CLK_EN)CSI_CFG_CLK_EN 0 (LOOPBK_TEST_EN)LOOPBK_TEST_EN

Description

csi host control by csi bridge.

Fields

CSI_ENABLECLK

enable clock lane module of csi phy.
CSI_CFG_CLK_EN

enable cfg_clk of csi host module.
LOOPBK_TEST_EN

for phy test by loopback dsi phy to csi phy.

Links

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Register License

Copyright 2024 Espressif Systems (Shanghai) PTE LTD

Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data